Title:
半導体装置及びその製造方法
Document Type and Number:
Japanese Patent JP3828581
Kind Code:
B2
Abstract:
Concerning a plurality of second bonding pads that are electrically connected with a plurality of first bonding pads provided on an IC chip and having a predetermined narrow pitch, a technique is disclosed that allows the plurality of second pads to be provided on the IC chip. This makes it possible to provide the second pads at desired positions. Accordingly, it becomes possible to form, by printing with a low accuracy, respective interconnections that connect the plurality of second pads with a plurality of electrodes provided on a substrate. Also, matching of positions is executed between the plurality of second pads and the plurality of electrodes formed on the substrate by printing. This matching makes it possible to electrically connect the second pads with the electrodes provided on the substrate in a such a manner that they are opposed to each other.
Inventors:
Mitsuo Usami
Application Number:
JP53333398A
Publication Date:
October 04, 2006
Filing Date:
December 26, 1996
Export Citation:
Assignee:
株式会社日立製作所
International Classes:
B42D15/10; G06K19/07; G06K19/077; H01L21/44; H01L21/48; H01L21/60; H01L23/02; H01L23/04; H01L23/34; H01L23/48; H01L23/485; H01L23/498; H01L23/538; H01L29/40
Domestic Patent References:
| JP62011696A | ||||
| JP8015167B2 | ||||
| JP7117385A | ||||
| JP8213419A | ||||
| JP8017955A |
Attorney, Agent or Firm:
Manabu Inoue