Title:
半導体装置およびその製造方法
Document Type and Number:
Japanese Patent JP3996315
Kind Code:
B2
Abstract:
Disclosed is a semiconductor device 10 comprising a first semiconductor element 11 with an arrangement of first element electrodes 12 , a second semiconductor element 13 with an arrangement of second element electrodes 14 , a connection member 15 electrically connecting together a portion 12 b of the first element electrodes 12 and the second element electrodes 14 , an insulation layer 17 covering a major surface 11 a of the first semiconductor element 11 and a backside surface 13 b of the second semiconductor element 13 , a wiring layer 22 formed on the insulation layer 17 and electrically connected to the first element electrode portion 12 b exposed in an opening portion 21 , and an external electrode 23 formed, as a portion of the wiring layer 22 , on the insulation layer 17.
Inventors:
Kazumi Watase
Hiroaki Fujimoto
Ryuichi Sahara
Noriyuki Kaino
Nozomi Shimoishizaka
Yoshifumi Nakamura
Takahiro Kumakawa
Hiroaki Fujimoto
Ryuichi Sahara
Noriyuki Kaino
Nozomi Shimoishizaka
Yoshifumi Nakamura
Takahiro Kumakawa
Application Number:
JP2000042130A
Publication Date:
October 24, 2007
Filing Date:
February 21, 2000
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
H01L25/065; H01L25/18; H01L23/31; H01L23/48; H01L23/498; H01L25/07
Domestic Patent References:
| JP11177020A | ||||
| JP1238049A | ||||
| JP5129516A |
Foreign References:
| US5977640 |
Attorney, Agent or Firm:
Hiroshi Maeda
Hiroshi Koyama
Hiroshi Koyama