Title:
半導体装置およびその製造方法
Document Type and Number:
Japanese Patent JP4678362
Kind Code:
B2
Abstract:
To provide a semiconductor device capable of writing and deleting data with a low voltage, and to provide a method of manufacturing the semiconductor device.
There are provided: an Si layer 5 formed on an Si layer 1 via an insulating film 3; an Si layer 9 formed on the Si layer 5 via an insulating film 7; a PMOS 20 formed on at least one side of the Si layer 5; and an NMOS 30 formed on at least one side of the Si layer 9. The PMOS 20 and the NMOS 30 have a common control gate 17 and a common floating gate 8. The common floating gate is arranged between the Si layers 5, 9. Writing and erasure to the common floating gate 8 are achieved by supplying two carriers of electrons and holes.
COPYRIGHT: (C)2008,JPO&INPIT
Inventors:
Juri Kato
Application Number:
JP2006324336A
Publication Date:
April 27, 2011
Filing Date:
November 30, 2006
Export Citation:
Assignee:
Seiko Epson Corporation
International Classes:
H01L29/792; H01L21/8247; H01L27/10; H01L27/115; H01L29/788
Domestic Patent References:
| JP2006140482A | ||||
| JP6077500A | ||||
| JP10335505A | ||||
| JP2005347328A |
Attorney, Agent or Firm:
Tetsuya Mori
Yoshiaki Naito
Hide Tanaka Tetsu
Yoshiaki Naito
Hide Tanaka Tetsu