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Patent Searching and Data


Title:
SEMICONDUCTOR INTEGRATED CIRCUIT FOR COMMUNICATION
Document Type and Number:
Japanese Patent JP2007259122
Kind Code:
A
Abstract:

To reduce the influence due to the leakage of an oscillation output signal of a reference frequency oscillator DCXO, generated when the level of the oscillation output signal of DCXO is converted by a level converter Lev_Conv to the vicinity of an oscillation output signal of a voltage control oscillator TXVCO for RF transmission by harmonic components.

The level converter Lev_Conv converts the level of the oscillation output signal of DCXO and supplies a level conversion signal to a phase comparator PDC of a PLL fractional synthesizer Frct_Synth, which controls oscillation frequencies of the voltage control oscillator TXVCO for RF transmission. The Lev_Conv includes a self-bias type voltage amplifier Self_Bias_Volt_Amp, which amplifies the reference frequency signal of the reference frequency oscillator DCXO. The self-bias type voltage amplifier includes a coupling capacity C1, an amplifier transistor Qn5, a load Qp5 and a bias element R1 and suppresses the level fluctuations of the harmonic components, even if external supply voltage Vdd_ext fluctuates.

COPYRIGHT: (C)2008,JPO&INPIT


Inventors:
UOZUMI TOSHIYA
SHINPO JIRO
Application Number:
JP2006081453A
Publication Date:
October 04, 2007
Filing Date:
March 23, 2006
Export Citation:
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Assignee:
RENESAS TECH CORP
International Classes:
H03L7/183; H03L7/08; H03L7/185; H03L7/197; H03L7/23; H04B1/04; H04B1/30; H04B1/3822; H04B1/40
Domestic Patent References:
JP2006013674A2006-01-12
JPH03273710A1991-12-04
JPS63281516A1988-11-18
JPS5455362A1979-05-02
JPH01138813A1989-05-31
JPH0269021A1990-03-08
JPH03205916A1991-09-09
JP2005094427A2005-04-07
JPH08204450A1996-08-09
Attorney, Agent or Firm:
Shizuyo Tamamura