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Patent Searching and Data


Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND FORMATION THEREFOR
Document Type and Number:
Japanese Patent JPH05109999
Kind Code:
A
Abstract:

PURPOSE: To improve hot carrier resistance and to obtain a current amount flowing between a source region and a drain region by introducing first impurity from an oblique direction by using a gate electrode as an impurity implanting mask, and implanting second impurity substantially from a perpendicular direction.

CONSTITUTION: After a gate insulating film 2, a gate electrode 3 are formed on a main surface of a p-type semiconductor substrate 1, with the electrode 3 as an impurity implanting mask n-type impurity 4An is implanted in the main surface of the substrate 1 from an oblique direction by an ion implanting unit to form a low impurity concentration n-type semiconductor region 4A. Then, n-type impurity 4Bn is similarly implanted in the main surface of the substrate 1 substantially from a perpendicular direction to form a slightly high impurity concentration n-type semiconductor region 4B. Thereafter, a sidewall spacer 5 is formed on a sidewall of the electrode 31 with the spacer 5 and the electrode 3 as impurity implanting masks n-type impurity 4Cn is implanted in the main surface of the substrate 1 substantially in a perpendicular direction to form a high impurity concentration semiconductor region 4C.


Inventors:
ISHIDA MOTOKO
OKUYAMA KOSUKE
IKEDA SHUJI
HASHIBA SOICHIRO
Application Number:
JP27250291A
Publication Date:
April 30, 1993
Filing Date:
October 21, 1991
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L21/8234; H01L21/336; H01L27/088; H01L29/78; (IPC1-7): H01L21/336; H01L27/088; H01L29/784
Attorney, Agent or Firm:
Akita Aki