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Patent Searching and Data


Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING SHIELDED MULTILAYER WIRING
Document Type and Number:
Japanese Patent JPH01298745
Kind Code:
A
Abstract:

PURPOSE: To effectively prevent the malfunction of a circuit caused by cross talk, etc., and decrease the area of a chip, by shielding between adjacent wiring layers including signal lines with a conductive layer exclusively used for a neutral signal.

CONSTITUTION: A metal layer 20 is formed on the whole surface above first layer wirings 12W14 through a layer insulating film 15. The metal layer 20 is connected to wiring 14 for a GND line through the through hole of the layer insulating film 15. Third layer metal wiring 22 is formed on the metal layer 20 through a layer insulating film 21 and a passivation film 23 is formed on the wiring 22. Forming the metal layer 20 on the whole surface and making the layer insulating films 15 and 21 of for example 1.2μm or more thickness respectively can reduce the parasitic capacity enough to ignore.


Inventors:
HAYASHI NORIMASA
NISHIKAWA MASAMI
Application Number:
JP12937588A
Publication Date:
December 01, 1989
Filing Date:
May 26, 1988
Export Citation:
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Assignee:
RICOH KK
International Classes:
H01L23/52; H01L21/3205; (IPC1-7): H01L21/88
Attorney, Agent or Firm:
Shigeo Noguchi