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Patent Searching and Data


Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND POWER CONTROL METHOD FOR THE DEVICE
Document Type and Number:
Japanese Patent JPH0561576
Kind Code:
A
Abstract:

PURPOSE: To reduce the load of a central processing unit (CPU) as much as possible and to reduce energy consumption by detecting an idle state in the manner of a hardware and automatically turning the device to a standby state by judging the idle state without depending on the processing program of the CPU.

CONSTITUTION: This device is equipped with an internal integrated circuit 11 to process signals, power control means 12 to control the power of the internal integrated circuit 11, and self-detection/standby control means 13 to control the power control means 12 and based on a state transition signal S1 related to the internal integrated circuit 11, the self-detection/standby control means 13 outputs a standby control signal S2 to the power control means 12.


Inventors:
TOKUKANUSHI HIDETAKA
Application Number:
JP22291891A
Publication Date:
March 12, 1993
Filing Date:
September 03, 1991
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F1/32; G06F1/04; G06F1/26; (IPC1-7): G06F1/04; G06F1/26; G06F1/32
Attorney, Agent or Firm:
Keizo Okamoto