Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPH0451511
Kind Code:
A
Abstract:
PURPOSE: To obtain a semiconductor integrated circuit device, which decreases the slippages during the composition of drawings by providing each function cell with patterns for detecting the dislocation at the time of compositing the drawings of a plurality of function cells.
CONSTITUTION: Each photomask is constituted of a function cell 1, 2, 3, or 4. And in the function cell 1 are arranged patterns 5, 6, 7 and 8 for slippage ditection, and in the function cell 2 are arranged patterns 10 and 11 for slippage detection, and in the function cell 3 is arranged a pattern 12 for detection, and in the function cell 4 is arranged the one 13 for slippage detection.
Inventors:
KASAHARA SHOICHIRO
Application Number:
JP16100490A
Publication Date:
February 20, 1992
Filing Date:
June 19, 1990
Export Citation:
Assignee:
SEIKO EPSON CORP
International Classes:
H01L21/027; H01L21/02; (IPC1-7): H01L21/02; H01L21/027
Attorney, Agent or Firm:
Kisaburo Suzuki (1 outside)
Next Patent: JPH0451512