Title:
SEMICONDUCTOR INTEGRATED CIRCUIT INCORPORATING OUTPUT PROTECTION CIRCUIT
Document Type and Number:
Japanese Patent JPH1155102
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To prevent a current from flowing into an output circuit with a volt age applied to a voltage output terminal of the output circuit by providing a control signal input terminal for controlling a conduction/non-conduction state of an n-channel MOS transistor(TR) to the output circuit and varying a voltage which is applied to the control signal input terminal. SOLUTION: With a high level voltage applied to an output terminal 8 and to a control signal input terminal 10, an n-channel MOS TR 9 becomes conductive and the output terminal 8 is clamped by a diode 2 and the n-channel MOS TR 9. With the control signal input terminal 10 set to a low level, since the n-channel MOS TR 9 is unable to be conducted, no current flows to the output circuit from the output terminal 8. That is, the output circuit and an external circuit connecting thereto are electrically disconnected irrespective of the ON/ OFF state of a power supply voltage of the output circuit by a voltage applied to the control terminal.
Inventors:
ISHIZUKI HITOSHI
Application Number:
JP20787697A
Publication Date:
February 26, 1999
Filing Date:
August 01, 1997
Export Citation:
Assignee:
NEC CORP
International Classes:
H01L21/8238; H01L27/092; H03K19/0175; H03K19/0948; (IPC1-7): H03K19/0175; H01L21/8238; H01L27/092; H03K19/0948
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)