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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT INCORPORATING ROM
Document Type and Number:
Japanese Patent JPS58220298
Kind Code:
A
Abstract:

PURPOSE: To deliver simply the contents of an ROM in order of their array, by increasing the content of a program counter one by one just by switching mode signal and then supplying the content of the ROM successively to an instruction decoder and at the same time delivering the contents of the ROM to the outside of an IC.

CONSTITUTION: When the logic of a signal 45 supplied from a mode signal register 8 is switched to 0, a load signal 41 if delivered from an instruction decoder 3 is prevented by an AND gate 46. The contents of a program counter 5 are increased by numerical value 1, and the contents of an ROM2 are supplied successively to the decoder 3 and then delivered outside an IC1. The logic of the signal 45 is set at 1 in a normal operation mode. Thus it is possible to take out the contents of an ROM to the outside of an IC with a simple circuit constitution and at a high speed. This makes it possible to test independently the contents of an ROM of a microcomputer, etc. or to use an ROM as a code generator.


Inventors:
UENO MASAAKI
Application Number:
JP10363682A
Publication Date:
December 21, 1983
Filing Date:
June 14, 1982
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G06F12/16; G06F9/30; G06F11/22; G06F15/78; G11C29/00; G11C29/02; G11C29/04; H01L27/10; (IPC1-7): G06F9/06; G06F9/30; G06F15/06; G11C29/00; H01L27/10
Domestic Patent References:
JPS5530786A1980-03-04
Attorney, Agent or Firm:
Masuo Oiwa



 
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