To provide a semiconductor integrated circuit and its test method, capable of executing burn-in of a logic circuit and a memory simultaneously, using a simple constitution.

This semiconductor integrated circuit 1 has a logic circuit part comprising a user logic circuit 10, and a scan chain 11 for performing its scan test, and a memory part comprising a memory 40, a BIST circuit 20, and a scan chain 21 for performing its scan test. The scan chains 11, 21 constitutes one scan chain 30, and the scan chain 21 is arranged at the output side of the scan chain 30. At the burn-in time, the scan chain 11 is set in the enable state, based on a scan enable signal, and the scan chain 21 is set in the disenable state, based on the scan enable signal and a memory test start signal; and stress is applied simultaneously to the user logic circuit 10 by the scan test, and to the memory 40 by BIST.

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