To provide a semiconductor integrated circuit capable of enhancing the accuracy of outputting timing of an output signal in relation to the variation of an ambient temperature, a process and the like, by minimizing influence on the output timing of the output signal due to the variation, and capable of supplying a signal to the outside in stable AC timing.

After the output signal (OUTSIGA1) outputted to the outside of an LSI and generated in the inside of the LSI by synchronizing with a clock signal delayed by a clock delay control circuit is received by a flip-flop circuit 14 to perform latching operation in timing synchronizing with an original clock signal (CLK) inputted from the outside of the LSI or its reversal signal (NCLKA), based on the original signal (CLK) inputted from the outside of the LSI, the signal (OUTSIGA2) is outputted to the outside of the LSI as the output signal (OUTSIGA).