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Title:
半導体集積回路
Document Type and Number:
Japanese Patent JP4279113
Kind Code:
B2
Abstract:

To provide a non-contact semiconductor chip with a random number generator capable of realizing random number generation with high random nature even in the case of generating random numbers at predetermined communication intervals, such as retry processing at the time of data collision and mutual authentication processing of communication data, in non-contact data communication.

In a semiconductor integrated circuit which is mounted on a non-contact IC card, operates by a system clock and performs the non-contact data communication, it is provided with the random number generator 15 having a prime number dividing circuit 31 which divides the system clock CLK1 by 5 or more prime numbers or division ratio consisting of multiples of the prime numbers and a random number generation circuit 32 which operates by a division clock CLK3 to be supplied from the prime number dividing circuit and generates pseudo random numbers.

COPYRIGHT: (C)2005,JPO&NCIPI


Inventors:
Ken Kimori
Application Number:
JP2003358752A
Publication Date:
June 17, 2009
Filing Date:
October 20, 2003
Export Citation:
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Assignee:
Renesas Technology Corp.
International Classes:
G06K19/07; H03K3/84; G06F1/04; G06F7/58
Domestic Patent References:
JP2002291972A
JP2002261587A
JP2001127507A
JP54151364A
JP2003288577A
JP2000222176A
JP8085283A
Attorney, Agent or Firm:
Shizuyo Tamamura



 
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