Title:
半導体集積回路
Document Type and Number:
Japanese Patent JP5714455
Kind Code:
B2
Abstract:
Disclosed herein is a semiconductor integrated circuit capable of detecting an abnormality that can cause a malfunction in signal transmission via an isolation element and of issuing a stop signal to the target to be controlled. The semiconductor integrated circuit includes a transmission circuit generating and outputting a transmission signal reflecting transmission data supplied from outside, a reception circuit reproducing the transmission data based on a reception signal, an isolation element isolating the transmission circuit from the reception circuit and transmitting the transmission signal as the reception signal, an abnormality detection part detecting an abnormality that can cause a malfunction in signal transmission via the isolation element, and a control part outputting a stop signal if the abnormality detection part detects the abnormality, regardless of the transmission data supplied to the transmission circuit from outside.
Inventors:
Return mountain Junichi
Application Number:
JP2011188245A
Publication Date:
May 07, 2015
Filing Date:
August 31, 2011
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
H04L25/02; H01F19/04; H03K17/08; H03K17/687
Domestic Patent References:
| JP2010010762A | ||||
| JP2012080156A | ||||
| JP2000115259A | ||||
| JP2010213246A | ||||
| JP61238143A | ||||
| JP2001238432A |
Foreign References:
| WO2010113383A1 |
Attorney, Agent or Firm:
Ken Ieiri