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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH01261837
Kind Code:
A
Abstract:

PURPOSE: To minimize inductance of a route from an input terminal to an input bonding pad and be free from limitation regarding an input signal containing a high frequency component by a method wherein bonding pads are located on a concentric circle on a semiconductor chip.

CONSTITUTION: An outer shape of a semiconductor chip 4 to be mounted on a package case 1 is made octagonal, bonding pads 5, 5... are located on a concentric circle, and the bonding pads 5, 5... are electrically connected to in-case leads 3, 3... of the package case 1. Therefore bonding pads 5 and leads 3 are connected by bonding wires 6 having the shortest and uniform length, realizing a route from each input terminal to a bonding pad 5 having uniform signal transmittance and at the same time minimizing inductance existing in the route.


Inventors:
HARASAWA AKIO
Application Number:
JP8999288A
Publication Date:
October 18, 1989
Filing Date:
April 12, 1988
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L21/60; H01L23/12; H01L23/50; (IPC1-7): H01L21/60; H01L23/12; H01L23/50
Attorney, Agent or Firm:
Sugano Naka



 
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