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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH0233952
Kind Code:
A
Abstract:

PURPOSE: To reduce a stray capacity between upper and lower layer interconnections, to improve coverage and to prevent the upper layer interconnection from stepwisely disconnecting by flattening the upper face of an interlayer insulating film, and forming an insulating film on a region including a through hole opened at the interlayer insulating film at the lower side of the lower layer interconnection.

CONSTITUTION: An insulating film 6 is formed at the lower side of a lower layer interconnection 2 at a position opened with a through hole 4, the interconnection 2 is raised upward at this part, and an upper layer interconnection 5 is connected via the hole 4 at the raised part. The thickness h11 of an interlayer insulating film 3 between the interconnections 2 and 5 is increased to reduce a stray capacity C1. Even if the thickness of the film is increased, the substantial thickness h12 of the film 3 is reduced at the part corresponding to the raiser of the part at the hole 4. Thus, the coverage is improved to prevent the interconnection 5 from stepwisely disconnecting.


Inventors:
ONO HAJIME
Application Number:
JP18411988A
Publication Date:
February 05, 1990
Filing Date:
July 23, 1988
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L23/522; H01L21/768; (IPC1-7): H01L21/90
Attorney, Agent or Firm:
Suzuki Akio



 
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