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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH06311028
Kind Code:
A
Abstract:

PURPOSE: To provide a voltage controlled oscillator and a PLL including it operated stably against power supply fluctuation due to digital noise by forming the circuit utilizing the manufacture process of the integrated circuit in the integrated circuit incorporating the digital voltage controlled oscillator.

CONSTITUTION: The semiconductor integrated circuit incorporating the digital voltage controlled oscillator onto a substrate is provided with a circuit 10 comprising diffusion resistors such as R1-R3 and MOS gate capacitance such as C1-C3 located between a power line and a power supply terminal of the digital voltage controlled oscillator, the power supply voltage terminal VDD of a power line is connected to one terminal 1 of the power supply terminals via the diffusion resistors such as R1-R3, one electrode of the MOS gate capacitance such as C1-C3 is connected to the diffusion resistor and the other electrode of the MOS gate capacitance is connected to other terminal of the power supply terminals such as a ground terminal.


Inventors:
SHIYUDOU HIROKI
YANO TAKAO
Application Number:
JP9749493A
Publication Date:
November 04, 1994
Filing Date:
April 23, 1993
Export Citation:
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Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H03H3/02; H03K3/354; H03L7/099; (IPC1-7): H03L7/099; H03H3/02; H03K3/354
Attorney, Agent or Firm:
Junnosuke Nakamura



 
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