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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS63124542
Kind Code:
A
Abstract:

PURPOSE: To measure the depth of grooves in a semiconductor device readily without destruction, by arranging a plurality of grooves in parallel, filling the grooves with polycrystalline silicon through an insulating film formed on the surface of the grooves, forming a capacitor between the grooves in order to measure the depths of the grooves, and measuring the capacitance of the capacitor.

CONSTITUTION: Two grooves 1 are formed in parallel in a semiconductor substrate 5 at the same depth as that of a groove in a memory cell. The grooves are filled With polycrystalline silicon 2 through an insulating film 6, which is formed on the surfaces of the grooves 1. Metal electrodes 4 are connected to the polycrystalline silicon 2 through contact holes 3. with the insulating film 6 as a dielectric film, a capacitor for measuring the depth of the grooves is formed. The capacitance of the capacitor for measuring the grooves which is constituted between the grooves 1 and 1 is measured, and the relationship between the depth of the grooves and the capacitance is obtained beforehand. Thus the depth of the grooves can be readily foundout from the value of the capacitance.


Inventors:
OZAWA MASAHIDE
Application Number:
JP27114986A
Publication Date:
May 28, 1988
Filing Date:
November 14, 1986
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L27/10; H01L21/66; (IPC1-7): H01L21/66; H01L27/10
Attorney, Agent or Firm:
Uchihara Shin



 
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