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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS63206992
Kind Code:
A
Abstract:

PURPOSE: To realize a stable sense amplifying action by crossing 1st and 2nd data lines to each other at a single position or plural positions in an area excluding an input terminal of a sense amplifier and securing the approximately equal counter length between both data lines and a signal line set adjacent to these data lines respectively.

CONSTITUTION: For a pair of the 1st and 2nd data lines D11 and D12, these two lines are set crossing to each other at the center parts of them in an area excluding an input terminal of a sense amplifier. Thus both lines D11 and D12 have the same counter length against an adjacent signal line D13. As a result, both lines D11 and D12 receive an equal amount of noises from the line D13 so that a stable sense amplifying action is secured with no malfunction.


Inventors:
YAMAMOTO AKIHIRO
Application Number:
JP3944887A
Publication Date:
August 26, 1988
Filing Date:
February 23, 1987
Export Citation:
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Assignee:
MATSUSHITA ELECTRONICS CORP
International Classes:
G11C11/401; G11C11/34; H01L21/8242; H01L27/10; H01L27/108; (IPC1-7): G11C11/34; H01L27/10
Domestic Patent References:
JPS60254489A1985-12-16
Foreign References:
US3942164A1976-03-02
Attorney, Agent or Firm:
Akira Kobiji (2 outside)



 
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