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Title:
SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
Document Type and Number:
Japanese Patent JP2001351993
Kind Code:
A
Abstract:

To provide a semiconductor memory device which can be readily increased in packing density, and to provide method for manufacturing the same.

The semiconductor memory device 20 has a structure which includes a second conductivity purity diffusion region 6 on the surface of the first conductivity semiconductor substrate 20, the second conductivity being opposite to the first conductivity, a floating gate electrode 9 formed on the semiconductor substrate 20 via a gate insulating film 7, and a control gate electrode 11 formed on the floating gate electrode 9 via an inter-electrode insulating film 10. Here, the gate insulating film 7 is formed on the surface of the semiconductor substrate 20, excepting the impurity diffusion region 6 and the third insulating film 5 thicker than the gate insulating film 7 is formed on the surface of the impurity diffusion region 6, and the floating gate electrode 9 is extended on the sidewall of the third insulating film 5.


Inventors:
TASAKA KAZUHIRO
Application Number:
JP2000167349A
Publication Date:
December 21, 2001
Filing Date:
June 05, 2000
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L21/28; H01L21/8247; H01L27/115; H01L29/423; H01L29/788; H01L29/792; (IPC1-7): H01L21/8247; H01L29/788; H01L29/792; H01L27/115
Domestic Patent References:
JPH02177564A1990-07-10
JPH09116119A1997-05-02
JPH1050965A1998-02-20
JPH1187543A1999-03-30
JPH11186414A1999-07-09
JPH09205154A1997-08-05
JPH0474477A1992-03-09
Foreign References:
EP0903788A21999-03-24
Attorney, Agent or Firm:
Takahashi Isamu