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Patent Searching and Data


Title:
SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR STORING INFORMATION
Document Type and Number:
Japanese Patent JP2002353412
Kind Code:
A
Abstract:

To reduce a resistance value of a capacitor after a breakdown without breaking a conduction in a semiconductor memory device utilizing a dielectric breakdown of the capacitor.

The semiconductor memory device comprises a variable voltage source 1, the capacitor 2 connected to the voltage source 1, an overcurrent suppressing circuit 5, having a parallel connecting circuit of a first resistor 3 and a second resistor 4 having a larger resistance value than that of the first resistor 3, and a controller 8 connected to the suppressing circuit 5. A high voltage is applied to the source 1, so that the capacitor 2 dielectric breaks down, and a large current flows to the resistor 3. Since the resistor 3 is disconnected by the current, damages due to the large current will not occur at the other part of the circuit. Even if the resistor 3 is disconnected, the entire circuit is not disconnected due to the presence of the resistor 4 which has a large resistance.


Inventors:
MINAMI TOSHIFUMI
Application Number:
JP2001155582A
Publication Date:
December 06, 2002
Filing Date:
May 24, 2001
Export Citation:
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Assignee:
TOSHIBA MICRO ELECTRONICS
TOSHIBA CORP
International Classes:
H01L27/10; H01L21/8242; H01L27/108; (IPC1-7): H01L27/10; H01L21/8242; H01L27/108
Attorney, Agent or Firm:
Hidekazu Miyoshi (7 outside)