PURPOSE: To prevent a normal word line arisen during a cycle when a standby word line rises by connecting a normal word line and ground via an N-channel transistor (TR) using a NAND output of an entire standby pre-decode signal as a gate signal.

CONSTITUTION: When one line in standby pre-decode lines 100 goes to an L level, an output of a NAND circuit 90 goes to an H level, an N-channel TR 50 is turned on and the normal word line 60 all goes to a ground level. Thus, an address signal is sent to a normal predecoder 20 from an address buffer 10 before a normal predecoder inhibition signal enters and one of normal pre- decode lines 30 is activated and the rising of the normal word line 60 is prevented by the normal word line driver 40. That is, the normal word line is grounded in selecting the standby word line 120. Thus, the rising of the normal word line during a cycle when the standby word line is selected is prevented.