PURPOSE: To obtain a highly integrated mask ROM by a method wherein diode elements are employed as memory cells and the respective memory cells are arranged three-dimensionally.

CONSTITUTION: A first layer memory cell array is composed of a first polycrystalline silicon layer 3, a contact hole 4 and a second polycrystalline silicon layer 5. A second layer memory cell array is composed of the second polycrystalline silicon layer 5, a contact hole 7 and a third polycrystalline silicon layer 8. P-N junctions are formed on the bottom parts of the contact holes 4 and 7 to provide electrical continuity between a word line and a dot line. Therefore, electrical characteristics at a cross point where a contact hole is formed and electrical characteristics at a cross point where a contact hole is not formed are different from each other and a mask ROM(read only memory) can store required information stationarily. With this constitution, a high performance and highly integrated semiconductor memory device can be obtained.