PURPOSE: To minimize power consumption in the backup operation of a CMOS memory device by detecting a drop in power source voltage and by controlling so that a power source current will be minimized in response to the detection output.

CONSTITUTION: When the memory device is held in information holding mode, namely, when power source voltage V1 is held at the low voltage level, transistor (TR) Q17 is cut off and the potential at coupling point P3 is held at the high level. Then, TRQ15 is turned off and TRQ16 is turned on, so that a control voltage which is the output of the inverter of Q15 and Q16 will be held at the low level. At this time, TRQ13 of input circuit 1 is turned on and TRQ14 is turned off to hold output point P2 at the high level. Since TRQ14 is cut off, power source current I never flows through input circuit 1 and the power consumption is zero.