Title:
SEMICONDUCTOR MEMORY
Document Type and Number:
Japanese Patent JP2000040370
Kind Code:
A
Abstract:
To provide a semiconductor memory capable of an over drive sensing in which a restoration to memory cells can be started right after a sensing in order to satisfy the time specification of the H period of a RASB(row address strobe bar) signal.
This semiconductor memory is provided with transfer gates controlling on and off of connections between bit lines DT, DN of a memory side and bit lines ST, SN of a sense amplifier side and a sense amplifier with which the bit lines of the sense amplifier side are connected to I/O busses by transistors whose on and off are controlled by a column selection signal and an amplifier which is connected to the bit lines of the memory side and which consists of P-channel transistors.
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Inventors:
MAKINO TATSUSHI
Application Number:
JP20914298A
Publication Date:
February 08, 2000
Filing Date:
July 24, 1998
Export Citation:
Assignee:
NEC CORP
International Classes:
G11C7/06; G11C11/401; G11C11/407; G11C11/409; G11C11/4091; (IPC1-7): G11C11/409; G11C11/401
Attorney, Agent or Firm:
Asato Kato