To quickly reduce a high-level voltage of a word line to a desired value without increasing power consumption.
A semiconductor memory includes a static memory cell, a word line connected to the transfer transistor of the static memory cell, a word driver for activating the word line, a first resistance part for connecting the word line to a low-level voltage line so as to reduce the high-level voltage of the word line corresponding to the activation of the word line and releasing the connection between the word line and the low-level voltage line after a first period from the activation of the word line, a second resistance part for connecting the word line to the high-level voltage line during at least a second period excluding the first period in the activation period of the word line, and a third resistance part for connecting the word line to the low-level voltage line during the second period and having on-resistance higher than that of the first resistance part. The high-level voltage of the word line during the second period is set lower than the voltage of the high-level voltage line by the resistance division of the second and third resistance parts.
JP2008176907A | 2008-07-31 | |||
JP2007066493A | 2007-03-15 | |||
JPH02302994A | 1990-12-14 | |||
JP2008171546A | 2008-07-24 | |||
JP2008176907A | 2008-07-31 | |||
JP2007066493A | 2007-03-15 | |||
JPH02302994A | 1990-12-14 | |||
JP2008171546A | 2008-07-24 |
Toshihide Mori