PURPOSE: To enhance the degree of integration and to charge high floating gates with high energy, by making the width of the floating gates equal to or narrower than the width of a drain region or a source region.

CONSTITUTION: "Writing" is made by applying a high voltage to a drain 3 and a control gate 2. For example, when the ratio of channel width/channel length of a transistors Tr 1 and Tr 3 is made to be 0.5μm and the ratio of channel width/channel length of a transistor Tr 2 is made to be 10/5μm, the parallel resistance of the transistors Tr 1 and Tr 3 becomes the high resistance about 10 times the transistor Tr 2. Therefore, when the high voltage is applied to the drain and the control gate of the floating gate type memory Tr 2, high energy electrons generated in the channel region exceed the energy gap in the conduction band of an insulating body 8, reach the floating gates 1, and charge the floating gates 1. The writing is performed in this way. "Erase" is performed by irradiating ultraviolet rays or light close to the ultraviolet rays thereby discharging the electrons in the floating gates.