Title:
SEMICONDUCTOR NONVOLATILE MEMORY AND WRITING METHOD THEREFOR
Document Type and Number:
Japanese Patent JP3227177
Kind Code:
B2
Abstract:
PURPOSE: To perform plural times of writing and correction of information to the semiconductor nonvolatile memory by using plural memory elements to be destructed by dissimilar voltage.
CONSTITUTION: When the high negative voltage is applied from a writing voltage supply terminal 8 through a bit line 6 to a source electrode 4 of a MOS transistor TR being a 1st memory element 1 and a thin film resistance layer being a 2nd memory element 7, the element 7 is destructed and disconnected first, the potential supply from a voltage Vdd side to the bit line 6 is stopped, and the writing of information to the element 7 is performed. The voltage supplied from the terminal 8 should be kept high enough not to destruct the element 1. To restore the state with the information written to the state of correcting the written information or to the state before writing the information, the MOSTR of the element 1 should be destructed. In short, the negative voltage higher than the voltage which destructs the thin film resistance layer is applied from the terminal 8 through the bit line 6 to the source electrode 4.
Inventors:
Katsumasa Nakano
Toshio Imai
Toshio Imai
Application Number:
JP20216291A
Publication Date:
November 12, 2001
Filing Date:
July 18, 1991
Export Citation:
Assignee:
Citizen Watch Co., Ltd.
International Classes:
G11C17/14; G11C17/00; (IPC1-7): G11C17/14; G11C17/00
Domestic Patent References:
| JP58141556A | ||||
| JP542326U |