PURPOSE: To save the number of bias circuits, by loading an FET having similar characteristics to a tip of two branch lines connected to a main line and connecting each gate to a capacitor for eliminating the deterioration in the characteristics of phase shifter due to unarranged characteristics.

CONSTITUTION: The drain and the gate of the FET11 are divided respectively into two to constitute the 1st and the 2nd drains 12, 13 and the 1st and the 2nd gates 14, 15, the source is used in common and a common source 16 is connected to a ground conductor 2 with a through-conductor 9. Further, the gates 14, 15 are connected to a capacitor 17, a bias circuit 18 is connected further to one end of the capacitor 17 so as to impress a bias volage to the gates 14, 15. Further, the drain 12 is connected to one branch line 4 and the drain 13 is connected to the other branch line 4, and the one end of the branch line 4 is connected to the main line 3 with approximately a 1/4-wavelength interval. The deterioration in the performance due to unarranged characteristics of the FET is prevented and the bias circuit is simplified in the phase shifter manufactured by using the FET11.