Title:
SEMICONDUCTOR READ ONLY MEMORY DEVICE
Document Type and Number:
Japanese Patent JPS53125736
Kind Code:
A
Abstract:
PURPOSE: To speed up the operation of a device, by representing one of a binary information with the constitution of enhancement type MOS transistors for switching and loading and by representing another of the binary information with constituting one of the both transistors as depletion type.
Inventors:
HIRATA MASAKI
Application Number:
JP4052677A
Publication Date:
November 02, 1978
Filing Date:
April 08, 1977
Export Citation:
Assignee:
NIPPON ELECTRIC CO
International Classes:
G11C17/00; G11C17/12; (IPC1-7): G11C17/00