Title:
SEMICONDUCTOR STORAGE DEVICE
Document Type and Number:
Japanese Patent JP3723599
Kind Code:
B2
Abstract:
PURPOSE: To reduce a power consumption of a semiconductor storage device.
CONSTITUTION: A memory cell 1 is connected between a bit line BL1 and an electrode node EN1. The transistor 1T and the capacitor 1C in the memory cell 1 are connected to the bit line BL1 and the electrode node WN1 respectively. In the operation, the potential of the electrode node 1 is reduced to a level L before the potential of the word line WL is raised. Charges are thereby read in the bit line only from the memory cell connected with the electrode node of which the potential is selectively reduced. As the result, the power consumption can be reduced.
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Inventors:
Takeshi Hamamoto
Application Number:
JP8294595A
Publication Date:
December 07, 2005
Filing Date:
April 07, 1995
Export Citation:
Assignee:
Renesas Technology Corp.
International Classes:
G11C11/413; G11C11/401; G11C11/404; G11C11/407; G11C11/4074; G11C11/409; G11C29/00; G11C29/04; H01L21/8242; H01L27/108; (IPC1-7): G11C11/404; H01L21/8242; H01L27/108
Domestic Patent References:
| JP4038787A | ||||
| JP4117695A | ||||
| JP55007635B1 | ||||
| JP6176572A | ||||
| JP7114792A |
Attorney, Agent or Firm:
Kuro Fukami
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Hisato Noda
Masayuki Sakai
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Hisato Noda
Masayuki Sakai
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