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Title:
SEMICONDUCTOR STORAGE DEVICE
Document Type and Number:
Japanese Patent JPH0357270
Kind Code:
A
Abstract:

PURPOSE: To highly integrate a multi-level memory cell by locally oxidizing parts forming electrodes of a capacitor, and electrically isolating adjacent electrodes of the capacitor by use of an insulating region.

CONSTITUTION: Polysilicon films 5, 7 to become transfer gates of work lines W are formed on a semiconductor substrate 1 through a thin oxide film to become a gate insulating film. An insulating film 4 is deposited to cover the silicon films to insulate between the silicon films and the lower electrode 5 of a capacitor. With an SiO2 film 9 remaining in a step and photoresist as masks an SiO2 film 8 is etched, and the exposed film 7 is oxidized. An oxide film is formed between the upper electrodes of the capacitor, and the upper electrodes Cu are electrically separated therebetween. Thus, a short-circuit of the electrodes 7 is prevented, and a multi-level memory having high integration is obtained.


Inventors:
FUJII HIROSHI
Application Number:
JP19346689A
Publication Date:
March 12, 1991
Filing Date:
July 25, 1989
Export Citation:
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Assignee:
SHARP KK
International Classes:
H01L27/04; H01L21/822; H01L21/8242; H01L27/10; H01L27/108; (IPC1-7): H01L27/04; H01L27/108
Attorney, Agent or Firm:
Takeshi Sugiyama (1 outside)



 
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