Title:
半導体基板およびその製造方法
Document Type and Number:
Japanese Patent JP4135564
Kind Code:
B2
Abstract:
In a semiconductor substrate for use in a semiconductor device in which first device components are disposed on an insulating material and second device components are fabricated, a thermal-oxide layer of 10 mum or more in thickness is formed in a region where the first device components are to be disposed, and a groove packed with a polycrystalline semiconductor is formed at an inward position from the peripheral edge of the thermal-oxide layer and along the same peripheral edge. A process for manufacturing this semiconductor substrate is also disclosed.
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Inventors:
Kazuhiro Tsuruta
Application Number:
JP2003159888A
Publication Date:
August 20, 2008
Filing Date:
June 04, 2003
Export Citation:
Assignee:
株式会社デンソー
International Classes:
H01L21/76; H01L21/762; H01L21/763; H01L21/822; H01L21/8234; H01L27/04; H01L27/06; H01L27/08; H01L27/12
Domestic Patent References:
| JP11233727A | ||||
| JP2000031264A | ||||
| JP2001274234A | ||||
| JP55078540A |
Attorney, Agent or Firm:
Hironobu Onda
Makoto Onda
Makoto Onda