Title:
半導体基板の製造方法
Document Type and Number:
Japanese Patent JP5477380
Kind Code:
B2
Abstract:
An IGBT (100), which is a vertical type IGBT allowing for reduced on-resistance while restraining defects from being produced, includes: a silicon carbide substrate (1), a drift layer (3), a well region (4), an n + region (5), an emitter contact electrode (92), a gate oxide film (91), a gate electrode (93), and a collector electrode (96). The silicon carbide substrate (1) includes: a base layer (10) made of silicon carbide and having p type conductivity; and a SiC layer (20) made of single-crystal silicon carbide and disposed on the base layer (10). The base layer (10) has a p type impurity concentration exceeding 1 × 10 18 cm -3 .
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Inventors:
Nobu Sasaki
Makoto Harada
Taro Nishiguchi
Shinsuke Fujiwara
Yasuo Namagawa
Makoto Harada
Taro Nishiguchi
Shinsuke Fujiwara
Yasuo Namagawa
Application Number:
JP2011513300A
Publication Date:
April 23, 2014
Filing Date:
April 27, 2010
Export Citation:
Assignee:
Sumitomo Electric Industries, Ltd.
International Classes:
H01L21/02; C30B29/36; H01L21/20
Domestic Patent References:
JPH1129397A | 1999-02-02 | |||
JPH11228295A | 1999-08-24 | |||
JP2006117512A | 2006-05-11 | |||
JPH1129397A | 1999-02-02 | |||
JPH11228295A | 1999-08-24 | |||
JP2006117512A | 2006-05-11 |
Foreign References:
WO1999000538A1 | 1999-01-07 | |||
WO2001018872A1 | 2001-03-15 | |||
WO1999000538A1 | 1999-01-07 | |||
WO2001018872A1 | 2001-03-15 |
Attorney, Agent or Firm:
Fukami patent office