Title:
SEMICONDUCTOR TESTER
Document Type and Number:
Japanese Patent JP2009257959
Kind Code:
A
Abstract:
To provide a semiconductor tester for performing a test at a high speed even when the test of a device to be measured is performed over a plurality of pin cards.
This semiconductor tester includes a tester controller for controlling a test sequence, and the plurality of pin cards connected to this tester controller via a control bus, and measures the device to be measured based on a command of the tester controller. The plurality of pin cards have a bus schedule management section for performing bus control via the control bus independently of the control of the tester controller.
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Inventors:
TAKESHITA HIROMOTO
Application Number:
JP2008107879A
Publication Date:
November 05, 2009
Filing Date:
April 17, 2008
Export Citation:
Assignee:
YOKOGAWA ELECTRIC CORP
International Classes:
G01R31/28