Title:
SEMICONDUCTOR TESTING APPARATUS
Document Type and Number:
Japanese Patent JP2818142
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To avoid an obstacle in the periphery of a test head and easily detach and attach a performance board, by setting the performance board onto the test head in a slidable manner so that the performance board can be taken out from the test head.
SOLUTION: A performance board 2 is arranged between a test head 1 and a device board 3 to be measured and located between a device 4 to be measured and the test head 1 to transmit signals necessary for tests. A plurality of guide pins 6 on the test head 1 are engaged with guide holes 5 of the performance board 2, whereby the performance board 2 is mounted at a predetermined position on the test head 1. Four sides of the performance board 2 are constituted of a reinforcing frame 7, and a handle 8 is set at each corner part. The performance board 2 is mounted on the test head 1 in a slidable fashion, so that the performance board 2 can be optionally taken out from the test head 1 while in a state disengaged from the pins.
Inventors:
Kaneko Masanori
Application Number:
JP32009295A
Publication Date:
October 30, 1998
Filing Date:
December 08, 1995
Export Citation:
Assignee:
Asia Electronics Co., Ltd.
International Classes:
G01R31/28; H01L21/66; G01R31/26; (IPC1-7): G01R31/26; G01R31/28; H01L21/66
Domestic Patent References:
| JP353179A | ||||
| JP9127197A | ||||
| JP6124982A | ||||
| JP63114229A | ||||
| JP466078U |
Attorney, Agent or Firm:
Toru Yui (2 outside)