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Title:
SEMICONDUCTOR WAFER MOUNT-PLATE AND SEMICONDUCTOR WAFER POLISHING METHOD USING MOUNT-PLATE AND MANAGEMENT DEVICE THEREOF
Document Type and Number:
Japanese Patent JPH11277415
Kind Code:
A
Abstract:

To provide a semiconductor wafer mount-plate and semiconductor wafer polishing method using the mount-plate and management device thereof which eliminate the need for reparing of the mount-plates to efficiently polish the semiconductor wafers by preventing the deformation of the mount-plates due to the changes with age.

Both a front face 11 and a rear face 12 of a mount-plate 1 precisely flattened. The mount-plate 1 is inverted for each batch of polishing. In relation to the mount-plate 1 fro which semiconductor wafers 10 are peeled off and which is cleaned, identification data and the surfaces in use are recognized, and the amount of deformation of the surfaces and the state of the frequencies of application, are sensed. When the deformation is not more than a specified value, the mount-plate is sent again to the process of mounting. When the deformation is more than the specified value, the mount-plate l is replaced with new one.


Inventors:
AZUMA JIYUNICHIRO
YAMASHITA KENJI
Application Number:
JP7735698A
Publication Date:
October 12, 1999
Filing Date:
March 25, 1998
Export Citation:
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Assignee:
KOMATSU DENSHI KINZOKU KK
International Classes:
B24B37/04; B24B37/30; H01L21/304; (IPC1-7): B24B37/04; H01L21/304
Attorney, Agent or Firm:
Akira Saito



 
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