PURPOSE: To execute the processing operation in the shortest time with regard to all logic to be controlled by applying a clock of the most suitable period for an operation of each logic to be controlled, with regard to the sequence controller which can execute an operation at a high speed.

CONSTITUTION: In the sequence controller which is constituted of sequence logic 1 and a clock generation source 3, and plural stages of logic 2-1, 2-2 to be controlled, and in which the logic 2-1 to be controlled of a first stage starts an operation by an output of the sequence logic 1 and a clock of the clock generation source 3, the logic 2-2 - to be controlled of a second stage and thereafter sets an output of the logic to be controlled of the previous stage as data and the operation is controlled by a clock of the clock generation source 3, it is provided with a clock processing circuit 4 inserted between the clock generation source 3 and the sequence logic 2-1-2-2 - to be controlled, and constituted so that a part of the output of the sequence logic 1 is also applied to the clock processing circuit 4.