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Title:
SEQUENCE CONTROLLER
Document Type and Number:
Japanese Patent JPS57153305
Kind Code:
A
Abstract:
PURPOSE:To avoid malfunction, by rejecting an external noise in a shorter time than a response time of a switch means connected to an output section, through the provision of a temporary storage section and transmission of a signal relating to output elements from the storage section to the output section in a short period. CONSTITUTION:A memory 22 is a memory storing a sequence processing step and a memory 23 is a user's RAM storing an internal set element at each step of a sequence circuit in program set in advance from a program set section 4. The 1st internal output storage section 24 is a temporary storage section which is arranged corresponding to a latch group of an output section and an output terminal group and possible for write-in and readout. The 2nd internal output storage section 25 is provided with a temporary storage section consisting of a plurality of storages, Y''1-Y''8 corresponding to output terminals Y1-Y3 and a latch group of the output section 3 similarly.

Inventors:
KUROKAWA NAOHIRO
ABE RIYOUICHI
Application Number:
JP3800581A
Publication Date:
September 21, 1982
Filing Date:
March 18, 1981
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
G05B19/05; G05B19/02; (IPC1-7): G05B19/02
Domestic Patent References:
JPS5539933A1980-03-21
JPS543673A1979-01-11