PURPOSE: To quicken the A/D converting operation and output operation of an A/D conversion data by synchronizing the A/D converting operation and the output operation of an A/D conversion data with a serial clock or the like.

CONSTITUTION: While conversion mode changeover signals AD/DA' are at H level, a reference voltage signal outputted from a D/A converter 1 is compared with an analog input signal ADI by a comparator circuit 2. An output signal of the circuit 2 is latched by an A/D conversion output latch circuit 3 is the timing of the trailing edge of an A/D conversion clock SCK' and fed to a D/A conversion input latch circuit 4, where a signal D0 among digital input signals D0∼D7 to the converter 1. A series of operations are repeated, the signals D6∼D0 are decided sequentially and the serial A/D conversion data ADO is outputted sequentially. On the other hand, when signals AD/DA' are at L level, a digital input signal DAI is latched sequentially by the circuit 4. Then the converting operation of the converter 1 is applied and a D/A conversion data DAO is outputted.