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Title:
SERIAL I/O OF DATA PROCESSING SYSTEM
Document Type and Number:
Japanese Patent JPS59191647
Kind Code:
A
Abstract:

PURPOSE: To attain the connection of both devices that transfer data at and after the maximum or minimum digit to the same microcomputer, by changing freely the data transfer direction for a serial I/O.

CONSTITUTION: A control register 8 is selected by a decoder 7 which decodes the address signal and delivers signals of high or low levels based on the data of an internal bus 2. These signals decides the shift direction of a shift register 6. Therefore the register 6 is shifted to the right if the register 8 is set by the decoder 7 and the output signal is set at a high level. Then the register 6 is delivered to a transmission terminal Tx from an output buffer 10b through a switch MOSFETQ1 which is turned on and with the MSB (maximum digit bit) set at the head. When the register 8 is reset and the output signal is set at a low level, the register 6 is shifted to the left. Then the data given from the bus 2 is delivered from the side of the LSB (minimum digit bit) through an MOSFETQ2.


Inventors:
KAWASHITA CHIE
OGITA KIYOSHI
YOSHIDA HISAFUMI
Application Number:
JP6533583A
Publication Date:
October 30, 1984
Filing Date:
April 15, 1983
Export Citation:
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Assignee:
HITACHI LTD
HITACHI MICROCUMPUTER ENG
International Classes:
G06F5/00; G06F13/00; G06F13/38; H03M9/00; (IPC1-7): G06F3/00; G06F3/04; G06F5/04
Attorney, Agent or Firm:
Katsuo Ogawa (1 person outside)



 
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