PURPOSE: To provide a serial data transmitter/receiver which has a simple constitution of a self-stopping counter and can omit the bit shift operation to set the head of a bit train at the head transmission bit of the data head byte.

CONSTITUTION: A self-stopping counter is constructed which carries out counting from -N up to zero by setting the complement of '2' of the all transmission bit number N as the initial count value 32 of a counter 18. The change of the most significant bit of the count value output, i.e., the change of the fall of a code bit is directly used as a count stop signal. Therefore the dividing unit of the parallel/serial conversion is defined every 8 bits starting at the final transmission bit of the final byte. Thus the transmission data are sent at an optional bit position of the head byte. Then a selector 12 defines the count value output of the counter 18 as the selection signals S0, S1 and S2 and selects one of those transmission data signal lines which are outputted from a FIFO memory 10 to send the serial data 1 in series and in sequence.