Title:
シリアル/パラレル変換回路及びパラレル/シリアル変換回路
Document Type and Number:
Japanese Patent JP4517891
Kind Code:
B2
Abstract:
A parallel-to-serial converter selects variable-m1-bit parallel dummy data from m-bit parallel dummy data (0<=m1<=m) together with a n-bit parallel data signal synchronized with a first clock signal having a first frequency, and converts the selected (n+m1)-bit parallel data into a (n+m1)-bit serial data signal synchronized with a second clock signal having a frequency (n+m1) times the first frequency. A serial-to-parallel converter circuit selects n-bit serial data from the (n+m1) parallel data signal and converts the n-bit serial data into a n-bit parallel data signal synchronized with the first clock signal.
Inventors:
Hideaki Kobayashi
Application Number:
JP2005053169A
Publication Date:
August 04, 2010
Filing Date:
February 28, 2005
Export Citation:
Assignee:
NEC
International Classes:
H03M9/00
Domestic Patent References:
| JP58161575A | ||||
| JP2004147353A | ||||
| JP2002135132A | ||||
| JP2000078027A | ||||
| JP62157424A | ||||
| JP62157425A | ||||
| JP2006013641A |
Attorney, Agent or Firm:
Kimura Mitsuru