PURPOSE: To realize the economical conversion of the serial data which have continuation between words, by storing temporarily the serial data alternately and with each prescribed word length in the form of the parallel data and then delivering these serial data alternately.

CONSTITUTION: Serial data DATA and a clock CLOCK are fed successively to a data buffer switching part 20. Then the CLOCK is sent to a clock counting part 10. The part 10 counts clocks with every prescribed number to produce the prescribed word length discrimination information Q1 and Q0 and feeds these information to the part 20 and a status information converting part 30. The DATA is switched at the part 20 in accordance with the information Q1 and Q0 and stored successively in shift registers 41, 42, 51 and 52 of the data buffer parts 40 and 50. While the information Q1 and Q0 are converted into the prescribed status information at the part 30 and fed to the data buses D0WD3. At the same time, the parallel data of registers 41, 42, 51 and 52 are fed alternately to the buses D0WD15 with the chip selection signal supplied from a microprocessor MPU through the buffer parts 40 and 50.