PURPOSE: To attain low power consumption by adding the constitution resetting simultaneously shift registers so as to decrease the number of inversions.

CONSTITUTION: When a data Da inputted from the first stage shift register SR1 reaches the n-th stage shift register SRn, a latch pulse Lp is generated so as to latch the output data to n-set of latch circuits from L1 to Ln thereby converting an input serial data into parallel output signals O1∼On, and a reset input Rin is given simultaneously to a reset terminal R of shift registers SR1∼SRn, the number of times inverting the polarity of the output data by resetting the content of all the shift registers SR1∼SRn to 0 (the same as setting all to 1).