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Title:
SHOCK NOISE PREVENTION CIRCUIT
Document Type and Number:
Japanese Patent JPH02137506
Kind Code:
A
Abstract:

PURPOSE: To prevent shock noise production by providing a differential amplifier having a couple of transistors-(TRs) Q, a time constant circuit in which bases of them are connected in common, the 1st TR Q whose base receives an output of the differential amplifier and the 2nd TR Q whose base receives the output of the 1st TR Q.

CONSTITUTION: With a switch 15 closed, a capacitor 13 is charged and TRs Q7, Q8 and Q11, Q12 are turned on at a prescribed value and a bias current is produced at a terminal 19. When the voltage across the capacitor 13 is further increased, the output of the TR Q12 reaches a prescribed value and n steady- state. While the terminal voltage of the capacitor 13 is low, the TRs Q17 is turned on and the TR Q16 is turned off. A small dark current flows to the TR Q16, the emitter voltage of the TR Q11 is reduced by deciding the resistance of a resistor 18 properly and the production of an output current of the TR Q11 due to the dark current and the occurrence of shock noise at application of power are prevented.


Inventors:
KOAKUTSU HIROSHI
Application Number:
JP29286088A
Publication Date:
May 25, 1990
Filing Date:
November 18, 1988
Export Citation:
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Assignee:
SANYO ELECTRIC CO
International Classes:
H03F1/00; (IPC1-7): H03F1/00
Attorney, Agent or Firm:
Koji Yasutomi (1 person outside)



 
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