Title:
SHUFFLING CIRCUIT
Document Type and Number:
Japanese Patent JP3452780
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To automatically return to a shuffiing operation, even when the shuffling operation is disturbed by detecting an error of a read address of image data at the present time and initializing a shuffling circuit.
SOLUTION: A read address generating part (operating part) 108 produces an output address of the next frame data from an output of address memory. An initialization address generating part 109 produces a write address of frame memory at the initializing. A selector 110 selects an output of the part 109 and outputs it at initializing of a shuffiing circuit and selects an output of address memory 107 and outputs it at the time of normal operation. An address error detection circuit 111 turns an output of the selector 110 into an input, counts a memory address that is supplied to the frame memory, detects an address error and reinitializes the shuflling circuit, when the address error has taken place.
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Inventors:
Masaru Yoshida
Application Number:
JP33328897A
Publication Date:
September 29, 2003
Filing Date:
December 03, 1997
Export Citation:
Assignee:
Sharp Corporation
International Classes:
H04N5/92; G11B20/18; H04N5/937; (IPC1-7): H04N5/937; G11B20/18
Domestic Patent References:
| JP591493A | ||||
| JP5183868A |
Attorney, Agent or Firm:
Akichika Takano