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Title:
SiC半導体装置
Document Type and Number:
Japanese Patent JP7402293
Kind Code:
B2
Abstract:
To provide an SiC semiconductor device capable of suppressing wet spreading of a conductive joining material in an SiC semiconductor layer including a side surface having a rough surface region.SOLUTION: An SiC semiconductor device 1 includes: an SiC semiconductor layer 2 having a laminate structure including an SiC semiconductor substrate 6 and an SiC epitaxial layer 7, and including an element formation surface composed of the SiC epitaxial layer 7; rough surface regions 20A to 20D formed in a portion composed of the SiC semiconductor substrate 6 in side surfaces 5A to 5D of the SiC semiconductor layer 2 and exposing the SiC epitaxial layer 7; and smooth surface regions 21A to 21D formed in a portion composed of the SiC epitaxial layer 7 in the side surfaces 5A to 5D of the SiC semiconductor layer 2.SELECTED DRAWING: Figure 3

Inventors:
Maya Ueno
Yuki Nakano
Sawa Haruyama
Yasuhiro Kawakami
Seiya Nakazawa
Yasunori Kutsuma
Application Number:
JP2022172528A
Publication Date:
December 20, 2023
Filing Date:
October 27, 2022
Export Citation:
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Assignee:
ROHM Co., Ltd.
International Classes:
H01L29/861; H01L21/329; H01L29/06; H01L29/78; H01L29/868
Domestic Patent References:
JP2015146406A
JP2014175313A
JP2012146878A
JP2017143185A
JP2007109783A
Foreign References:
WO2016092895A1
US20160005827
US20140001679
Attorney, Agent or Firm:
Patent Attorney Corporation Ai Patent Office