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Title:
SIGNAL CONVERSION CIRCUIT
Document Type and Number:
Japanese Patent JPH01291514
Kind Code:
A
Abstract:

PURPOSE: To keep the continuation of the phase of an output signal in the neighborhood of speed switching by forming each table corresponding to each signal conversion speed, and setting output read out at an address from one table decided by a control signal and the address as the output signal.

CONSTITUTION: An input signal Sin is impressed on up/down(U/D) control input, and also, the output signal Sout is outputted from a memory 12 consisting of a ROM. The load signal detecting part 212 of a control part 21 detects the reception of a speed command SC, and after the delay of a prescribed time, supplies a load command CT2 to the load terminal LD of a counter 11. At this time, an initial value I is inputted. Meanwhile, the magnification decision pat 211 of the control part 21 compares signal conversion speed until then with that hereafter, and decides a magnification (k), and impresses a signal CT 1 on a selector 222. The magnification multiplication part 221 of a magnification setting part 22 multiplies the address(ad) by respective magnification (k). A multiplied value is taken out alternatively at the selector 222 of the magnification setting part 22, then, it becomes the initial value I.


Inventors:
AONO YOSHITAMI
IWAMATSU TAKANORI
SAITO MASAKATSU
Application Number:
JP12051688A
Publication Date:
November 24, 1989
Filing Date:
May 19, 1988
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H03H15/00; H04B3/04; (IPC1-7): H03H15/00
Attorney, Agent or Firm:
Aoki Akira (4 outside)



 
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