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Title:
SIGNAL DETECTION CIRCUIT
Document Type and Number:
Japanese Patent JPS6187418
Kind Code:
A
Abstract:

PURPOSE: To make the end time of a burst signal coincident with the end time of signal detection by combining a retriggerable monostable multivibrator, a delay circuit and an OR circuit.

CONSTITUTION: A burst signal 101 consists of a preamble part of H(L) level, a data part being an H(L) level at each N-bit or below and a post-amble part of H(L) level consecutive for N-bit time or over. The retriggerable monostable multivibrator 300 having a holding time being an N-bit time or over and a consecutive time of the post-amble to bring all the data part to H(L) level is provided. On the other hand, the delay circuit 100 gives a time delay longer than the operating delay time of the monostable multivibrator 300 to the burst signal 101. Then both outputs of the monostable multivibrator 300 and the delay circuit 100 are fed to the OR circuit 400 to obtain a detection signal. Thus, the end time of the burst signal and the end time of signal detection are made coincident with each other.


Inventors:
KAWATOKO TSURAYUKI
Application Number:
JP20713284A
Publication Date:
May 02, 1986
Filing Date:
October 04, 1984
Export Citation:
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Assignee:
NEC CORP
International Classes:
H03K5/00; H03K5/19; (IPC1-7): H03K5/00
Attorney, Agent or Firm:
Murao Mikio



 
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